It is a constant endeavor to find ways of reducing the cell size of liquid crystal displays. An important consideration is to sustain light transmission efficiency as the cell size is reduced by maintaining the fractional area of the display through which the light is transmitted. It is noted that display cell structures that are based on the transmissive liquid crystal technologies are well developed. These structures take advantage of simple and low cost optics. However, as the display cell size is made to shrink to 20 microns or less, the fractional area transmitting the light, called the aperture ratio, of the conventional designs becomes unacceptably low. This is primarily due to the light obscuring properties of the opaque areas within each pixel taken up by the row and column lines, the transistor-thin-film (TFT), and the storage capacitor. This becomes a critical performance problem when considering for example the needs of monochromatic head-mounted or optical projection displays required for a UXGA form factor. These require provision of 1600.times.1280 pixels, each with a cell size of 18.times.18 .mu.m.sup.2. A comparable colored display requires a cell size of 6.times.18 .mu.m.sup.2. A useful display should provide an aperture ratio of greater than 30%.
A prior art pixel layout for a thin-film transistor liquid crystal display is shown in FIG. 1. FIG. 1 shows a single pixel 100 with its associated components in the path of the light transmission. The data line 102 defines the pixel's vertical boundary. The gate line 106 defines the pixel's horizontal boundary. A TFT 104 is formed at a junction of the gate line and the data line. The cell capacitor 112 is shown running horizontally along the lower portion of the aperture 110. The size of the aperture 110 shown is reduced by the presence of the capacitor 112 by 10-20%. As the cell size is reduced further, the capacitor takes a larger percentage of the otherwise available aperture area.
FIG. 2 shows the equivalent electrical circuit of a pixel 200. It shows a vertical data line 202 and a horizontal gate line 204. A thin film transistor 212 has its gate terminal connected to the gate line 204 and its source terminal connected to the data line 202. An inherent liquid crystal common electrode capacitor C.sub.LC 206 occurs between the TFT's drain 214 and the common electrode 210. It nominally has a capacitance of 1 femto-Farad. A storage capacitor C.sub.s 208 is formed between the TFT drain 214 and the common electrode 210, normally at ground potential. C.sub.s 208 needs to be in the range of 20-100 femto-Farad. The placement and formation of this storage capacitor C.sub.S 208 are the subject of the present invention. As fabricated previous to this invention the storage capacitor significantly reduces the aperture area so that none of the existing transmissive liquid crystal cells on poly-Silicon or C--Si can be scaled to the very small cell sizes required while maintaining a 30% aperture ratio. Two alternatives have been suggested. One is to use reflective cells. This approach requires more expensive optical components. The other approach calls for self-luminous cells such as the LED, electroluminescence, or organic-LED cells. All self-luminous cells face a differential aging problem. This problem is still a material-related unknown at the present time.
In prior liquid crystal displays, the storage capacitor obscures about 10 to 20% of a large cell's region through which light is transmitted in the transmissive display. The percentage of region obscured by the storage capacitor in a display with a small cell size becomes almost intolerable. The present invention solves this problem by using a vertical trench capacitor which is hidden behind the row and column lines such that the region of each pixel through which light passes is obscured only by a single transistor and the row and column x and y lines.